NVIDIA Vice President of Hardware Engineering: Accumulated shipments of 1 billion MCUs based on RISC-V architecture.

At the 2025 RISC-V Global Summit, Frans Sijstermans, Vice President of Hardware Engineering at NVIDIA, stated that as early as 2017, NVIDIA had co-hosted the first RISC-V workshop outside of North America with Shanghai Jiao Tong University. At that time, NVIDIA had already been the first to apply RISC-V technology to embedded MCUs. So far, the company's integrated MCU products based on this architecture have shipped a total of one billion units.