Alleviating the CoWoS gap does not mean the bottleneck is removed: TPU diversion and Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR (TSM.US) CoPoS layout reveals the repricing of AI computing power.

Wedbush Securities, a well-known investment firm on Wall Street, released a research report on Monday stating that the US tech giant Alphabet's Alphabet Inc. Class C may be in talks with South Korean chip manufacturing giant Samsung Electronics to manufacture some hardware components for its Tensor Processing Unit (TPU) for AI training/inference systems, highlighting how tight Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's actual advanced process AI chip manufacturing and advanced packaging capacity is. Additionally, as Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR aims to further push high-performance AI chip packaging from "wafer-level packaging" to "panel-level large-scale packaging" with its CoWoS advanced packaging system, the CoPoS is scheduled to enter mass production by 2028, becoming the core growth drive for Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR's advanced packaging business. Wedbush's latest analysis is a counterattack to the linear market view that the "shrinking CoWoS capacity/supply gap equals AI computing core advanced packaging bottleneck loosening," indicating that the bottleneck of AI computing infrastructure is undergoing a major upgrade and migration. According to Wedbush's analyst team, the narrowing of the CoWoS gap from 20% to around 10% by the end of 2026 indicates that the current generation of AI chip advanced packaging supply and demand tension may be marginally easing, but it cannot be inferred as a complete resolution of the AI computing industry's bottleneck. The latest capacity planning for CoPoS by Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR further indicates that the next stage of the AI computing infrastructure bottleneck is likely to shift from "not enough CoWoS capacity" to "whether large-sized AI chips can be mass-produced with acceptable yield and cost using CoPoS advanced packaging." Nicknamed "Fruit Chain Prophet," Kuo Ming-chi stated that CoPoS is expected to enter mass production in the second half of 2028, with the goal of improving the cost-effectiveness of large-sized AI packaging with 9.5 times larger reticle size or above, with NVIDIA Corporation's Feynman AI GPU architecture possibly being one of the first adopters; this means that Taiwan Semiconductor Manufacturing Co., Ltd. Sponsored ADR is paving the way for larger-sized chips, higher HBM stacking, and more complex chiplet advanced packaging heterogenous integration in the post-Rubin Ultra/Feynman GPU computing era. If the narrowing of the CoWoS supply gap represents short-term supply improvement, the CoPoS roadmap represents a longer-term trend of upgrading the AI computing infrastructure bottleneck. In the view of major Wall Street banks, the scarcity of supply associated with the AI computing chain has not diminished in any way, but has shifted from a logic of CoWoS expansion to a new round of supply scarcity pricing based on advanced process price increases, next-generation CoPoS large-sized...