Citi raises target price on Micron (MU.US) to $840! Target price nearly doubled, forecasts DRAM average price to soar 200% next year.

date
20:15 19/05/2026
avatar
GMT Eight
Citigroup has significantly raised its stock price target for Micron Technology (MU.US) from $425 to $840 and maintains a "buy" rating.
Citigroup raised the target price of Micron Technology, Inc. (MU.US) stock from $425 to $840 and maintained a "buy" rating. The reason cited was the expectation that the company would increase the price of dynamic random access memory (DRAM). Analysts stated: "We raised Micron's target price from $425 (5 times the earnings per share for 2027) to $840 (8 times the earnings per share for 2027) because we believe that after Samsung increased DRAM prices by 100% in the first natural year, Micron will raise DRAM prices by over 40% in the second natural year. In addition, we expect the DRAM boom cycle to continue until 2027 and anticipate that the price of high bandwidth memory (HBM) will rise next year." "Most of the DRAM price increases this year have been concentrated on the supply-demand imbalance for commoditized or non-HBM DRAM. Despite the expected growth of over 30% in silicon system sales by equipment manufacturers such as Applied Materials (AMAT.US) in the near future, we believe that by the end of 2026, the supply growth rate for DRAM bits is heading towards 30%, but additional new wafer capacity will still be needed to meet the AI demand in 2027. We aligned Micron's forecast with Citigroup's research view, that the average selling price (ASP) of DRAM in 2026 will skyrocket by 200% year-on-year, while the average selling price of NAND in 2026 will increase by 186% year-on-year." South Korean companies SK Hynix and Samsung Electronics rank among the world's largest memory chip manufacturers. SK Hynix is a major supplier of NVIDIA Corporation's HBM chips. Samsung and Micron compete with SK Hynix in this field. Citigroup analysts pointed out that the supply of HBM is still tight. The analysts added that due to the 3:4 wafer conversion rate and the difference in profit margins between HBM and commoditized markets, memory manufacturers currently lack the incentive to convert or increase additional HBM capacity. The 3:4 wafer conversion rate usually refers to the physical switch or processing cost comparison between 3-inch and 4-inch semiconductor substrates. The analysts also added that, due to the tight HBM capacity, they expect HBM pricing to rise in 2027, and memory manufacturers will exercise restraint in increasing supply to prevent a reduction in HBM adoption in AI data centers next year. The analysts mentioned that last week, in response to strong pricing, Cisco Systems, Inc. reduced DRAM adoption by 50% in over 20 projects, including wireless products. The manufacturing process of HBM capacity is unique, including the most complex advanced packaging, through-silicon vias (TSV), and yield issues in the memory chip industry so far. Clean room restrictions and higher green energy efficiency requirements are hindering rapid capacity expansion to address price hikes. Traditionally, when prices are highly favorable for memory chip manufacturers, supply usually increases quickly in response. However, the industry currently faces many structural constraintsespecially the increasingly scarce production capacity of HBM, limited elasticity of general DRAM/NAND supply, and the continuous faster-than-expected growth in demand driven by AI. During Micron Technology, Inc.'s first-quarter earnings conference call, the company's senior vice president and general manager of the data center business unit, Jeremy Werner, specifically mentioned the explosion in demand for high-capacity data center SSDs, KV cache deployments for AI infrastructure, and PCIe Gen6 SSD demands related to NVIDIA Corporation's AI compute infrastructure clusters. This indicates that the demand for AI-related storage chips is much broader than many Wall Street analysts expected. Modern AI infrastructure not only consumes more HBM memory, but also requires high-bandwidth DRAM, more storage capacity, and high-speed SSD infrastructure to meet the growing demands of retrieval and agentic AI workloads. Emerging AI applications, including Siasun Robot & Automation, multi-AI agent systems, and multimodal reasoning models, continue to create new storage demand vectors, implying that AI storage density may continue to grow exponentially even after AI deployment is complete. As revealed by Jeremy Werner, Micron Technology, Inc.'s CPU Center Data Flow Processing Engineering Logic in a recent interview, the underside DRIVE of this round of the trend is not as simple as "AI needs more computing chips" when it comes to the basic AI data center data flow processing logic. Claude Cowork, and AI agents like OpenClaw are pushing memory/storage from supporting components to the system bottleneck. AI training processes rely more on massive parallel computing, while inference, especially in long-context, multi-turn conversation, agentic AI workflows, requires continuous preservation of KV cache, context states, and intermediate results. When memory/storage space is insufficient, models have to recalculate historical states, GPU utilization decreases, and token generation costs rise. Therefore, HBM, DDR5, LPDDR, enterprise-level SSDs, and even HDD/data lakes are forming an "AI memory chain" from the GPU near-end to remote storage, determining the throughput, latency, concurrency capacity, and unit token economics of AI systems. This is why storage and data storage stocks such as Micron, Samsung, SK Hynix, SanDisk, Western Digital Corporation, etc., are experiencing a surge in tandem: demand is not only focused on HBM, but is overflowing along the entire chain from AI server architecture to DRAM, NAND, SSD, and HDD.